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Turing-Pi 2 Evolution (feature request)
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p

peter.duckett

03/28/2023, 8:40 AM
Given that we should be starting to see the TPi2 in our hands soon what would people like to see changed in the original design IF WE EVER got a TPi V2.1 (Please no comments about the RTC issue that goes without saying) Please be positive in the community spirit some ideas I would like to see would be, The movement of header ports (Power Connector, SATA, USB3 header) away from the front of the broad preferably to the side to aid airflow though the cards installed Dedicated USB header for the CM4 Mode port (I could see this of more use on the front of a case) Move the reset BMC buttons onto the Back plate at right angle to the broad for easier access from the rear of the case Maybe an ATX version with 6 or 8 nodes? PWM fan for system fan (Maybe two instead of 1) Maybe also add PWM for the nodes also (Forgot that thanks @segabor ) Upgraded Ethernet 2.5gb maybe useful depending on the use case, I would expect that would almost allow Max throughput of all connected broads currently Maybe mPCIe that supports SPI for LORWAN gateways (though not sure how this might be achieved perhaps some small jumper switch) POE class 4
w

wvaske

03/28/2023, 1:16 PM
Agree with a lot of these. Multi-gig up link on the switch. It's become common enough they should be able to find a well priced switch chip. More nodes. The TPI1 had seven and is the same for factor with DIMM connectors. More PIs please. A custom heatsink. They know the dimensions very exactly, I'd like to see a custom heatsink that uses all the space, similar to what the Compute Blade Kickstarter is doing.
s

segabor

03/28/2023, 1:34 PM
Well, I love the current hardware but what I feel can be improved a lot is the BIOS. Everytime I want to shut down the whole stuff I need to make sure each OS is halted before pressing the Power button. Thermal management: is it working anyway? My Thermaltake case has a big front fan and it has never been rotated a bit. Also, UART pins could have an attachable PCI cover having an USB female port. More nodes would be a big win!
s

srcshelton

04/13/2023, 12:01 PM
Ability to update the routing of the on-board switch, for example to route Nodes 1 & 2 only to NIC1 and Nodes 3 & 4 only to NIC2, for example. Plus a dedicated BMC management port.
t

terarex

04/13/2023, 12:32 PM
The current switch chip supports tagged and protocol VLANs. That might be a way to get what you want. TMs hasn't disclosed the feature set they might implement in the new firmware.
u

unjeh

04/13/2023, 4:28 PM
Maybe remove the fixed mounting nuts (make em non fixed?) on the m2 x 60 spacing to allow for dual sided nvme 22x80 drives without desoldering said nuts.
t

terarex

04/13/2023, 4:49 PM
+1 for making the mPCIe and M.2 anchor points removable/relocatable.
I'd like for Turing Machines to fully debug and fix node1 USB flashing and HDMI. I'd also like to see the BMC chip updated to the T113-S4 (256MB vs 128MB) and increase the amount of flash available to the BMC to host dual, more full-featued, boot images.
j

jonathanbennett

04/14/2023, 12:19 AM
HDMI duplexing of all 4 slots would be really handy for troubleshooting and maintenance.
w

wilsonrighetti

04/19/2023, 9:00 PM
KVM switch?
u

_dhanos_

04/19/2023, 9:06 PM
It kind of has one - the USB port. But do you mean for video output?
w

wilsonrighetti

04/19/2023, 9:08 PM
well, many people on the chat here ask about video and keyboad/mouse. We kind of keep saying, video only Node 1, but not keyboard with Jetson and blah blah. If we have this KVM switch we could just configure which ones will get the inputs/outputs. But, maybe this would impact the lanes used by specific nodes, as example, node 3 has SATA and others not. Maybe new versions of compute modules would also help on this matter
u

_dhanos_

04/19/2023, 9:09 PM
Ok, I understand what do you mean now, but also can see the challenge here 🙂
t

terarex

04/19/2023, 9:35 PM
I'd be happy with a switchable 5 channel TTL to USB-A male adapter. Basically a serial KVM. Cabling would be a PITA. Having 5 USB-to-TTL/UART cable is overkill.
u

_dhanos_

04/19/2023, 9:36 PM
The question is if you can use the BMC for this, which already has UART connections to all of the nodes
p

phearzero

04/19/2023, 9:38 PM
Having the BMC as a node would be useful for upgrading/different use cases.
t

terarex

04/19/2023, 9:39 PM
I guess that works. I want a console connection if the BMC uses the tty ports. That way maybe they don't step on each other.
t

the_boom_boom

04/21/2023, 3:35 AM
moar nodes!
u

_dhanos_

04/21/2023, 3:35 AM
Oh, you never have too many 😄
a

alastair.q8

04/22/2023, 6:59 AM
I'd remove one sata port seeing that each node can have an nvme drive. Two sata ports seems like overkill to me.
u

_dhanos_

04/22/2023, 12:33 PM
There's never too many 😄
Also, CM4 cannot use M.2, so SATA will be useful 🙂
a

alastair.q8

04/22/2023, 12:36 PM
Well Daniel you're special. 😂 The removal of the one sata port could open space for something else is what I meant to say.
u

_dhanos_

04/22/2023, 12:41 PM
Hehehe 😉
When I think of it, there's still a lot of space. If anything, the ports could be stacked the other way opening some space anyway if the team needed this space
People also use 2 ports for data safety (drive mirror called RAID1)
I only mean 2 SATA oirts are useful 🙂
a

alastair.q8

04/22/2023, 12:47 PM
I see your point. In my use case I'll have one Pi installed and hopefully two RK1s and an AI accelerator. All the nodes except for the Pi will have nvme drives. The Pi will be attached to the SATA port. I don't need data redundancy. I am using this as a learning platform.
u

_dhanos_

04/22/2023, 12:50 PM
Yeah, I understand. But then if you put the board to actual work and you have actual data you care about, disk redundancy is rather a must have. In my PC I keep file with redundancy for many many years now (previously RAO1 off of 2 disks, now RAID5 off of 3 disks). This is why I would sat the second SATA port is actually useful 🙂
a

alastair.q8

04/22/2023, 1:00 PM
True about how important your data is to you. Well this is the first iteration of the retail TPi2 and the team might release more SKUs that are more tailored to specific use cases. The issue is that the more features are added on this size board the more complicated the construction of it gets. Not saying it will definitely lead to more issues but, chances are they will. At the end of the day I want something reliable which it is easy to forget is an intrinsic feature we all want.
s

srcshelton

04/25/2023, 8:08 AM
There’s much to learn from the TP2, but given the time it takes to make major design changes and the sheer cost, I’d expect the next revision will be TP3/RPi CM5 (… on the assumption that the RKx boards don’t become the primary use-case)
c

cguijt

04/26/2023, 9:50 PM
My 2 cents: if the earlier mentioned KVM is unavailable, move the USB3 controller to node 1 so that at least one node has HDMI + USB access 🙂
u

_dhanos_

04/26/2023, 10:36 PM
While this is a valid idea, if you want a USB right now, you can get a Mini PCIe USB controller - having a Mini PCIe for node 1 give you options what do you want to have connected to the Node 1
c

cguijt

04/26/2023, 10:38 PM
I'm aware, the idea I mentioned was purely to prevent the need of such controller if you only need it occasionally, like installing a Jetson module 😉
u

_dhanos_

04/26/2023, 10:39 PM
Sure, just making sure you are aware about this possibility 🙂
d

dethtungue

04/28/2023, 1:12 PM
Yes please. If HDMI Duplexing is not an option, having connected USB ports on the same node as the HDMI interface is a must-have. Otherwise, we all have to source and then swap in/out mini PCIe USB adapters.
t

the_boom_boom

04/28/2023, 5:51 PM
if you've populated node4 then you could use use usbip to give node1 access to the usb ports
s

scienceman.

05/01/2023, 10:47 PM
An Aspeed or other server-class BMC chip, please! It will make it much easier to develop code, implement useful features, etc.
g

goatherder.

05/03/2023, 2:35 AM
Whilst the UART connectors and the sd card connections are really important it would be cool if there was a header block with cable that you attach so you expose these interfaces on the outside of a case. So you do not have to crack the case everytime you need to interface to it
s

srcshelton

05/03/2023, 8:32 AM
I've been trying to find a PCI bracket with Female-Female pass-through USB connectors, so that a UART/USB cable could be used internally and a USB-A/A cable externally... although I've not found anything suitable yet. I have found UART/DB-9 PCI brackets, which could be used for an old-skool serial setup? (... I guess the other option would be a UART/RJ-45 face-plate?) I've not looked for PCI brackets with an SD slot, but I have an SD extension ribbon-cable installed in my system, meaning I have to crack open the case but not unmount the mainboard to get to the (BMC) SD card, which feels good enough for now.
c

cfsworks

05/03/2023, 8:18 PM
This one's a low-hanging-fruit idea for a future minor revision: if the node control GPIOs (
{EN, RST, USB_VBUS, RPIBOOT} * 4
) can be moved out to a GPIO expander (e.g. PCA9555 on I²C), that would free up 16 pins for other purposes... ...including running RGMII to the RTL8201F a GbE PHY, so we get 1Gbps to the BMC instead of 100Mbps. 😀
s

schraubersimmie

05/05/2023, 11:47 PM
For future IO-shields: If you don't put the cutouts in the "normal mounting position", but raise them by 20 mm. They still fit in the slot cover and it would allow to mount the TP2 board raised in every case to make space for NVMe SSD with coolers.
m

maarten morinsights.nl

05/14/2023, 2:16 PM
BMC ability to somehow send a "soft shutdown via power button" command to the nodes. Instead of a hard Node Power Off via the power control only being available. Please
r

rexter0

05/29/2023, 6:13 AM
Give a lot more focus to the ability to flash nodes. There should be no requirement to swap cards in and out just to do flashing or direct node management. 1. BMC should have access to nvme cards so one could flash from bms to all for nvme drives. 2. KVM switch to switch keyboard mouse monitor between each node, again controlled via bms 3. Put the display type switch in BMC config file so one can switch in software
a

acelink.io

05/30/2023, 1:09 AM
Move all USB connectors to USB type C! Death to microUSB! TypeA should be EoL
s

srcshelton

05/31/2023, 1:17 PM
It'd be great on a per-Node basis to expose at least GPIO pins (5V, GND, and something like GPIO18?) to drive a 5V PWM fan under software/OS control. Due to the positioning of my case-fan, I've got passive heatsinks on Nodes 1-3, but then a PWM fan on Node 4 which is controlled via software and Node 1's GPIO PWM output (based on a daemon process running on Node 1 and a simple REST interface on Node 4 which reports the current temperature!). This does mean that Node 4 only receives temperature-dependent cooling when Node 1 is running, of course...
t

teslamax

06/09/2023, 11:24 PM
perhaps an I²C PWM fan controller?
I think someone mentioned the possibility of a new CM4 adapter design that also included such an option, but I have no idea if it might ever become reality
s

scienceman.

06/09/2023, 11:45 PM
I think in addition to the excellent suggestions by @rexter0 above that making the existing 2-pin main board fan connector into a 4-pin one with speed signals controlled by a temperature sensor on the switch heat sink would make sense, since that is the hottest part of the current board.
d

dkryptlive

07/03/2023, 3:32 PM
I agree with this… don’t take away our sata, more sata please! Or at least figure out a way to get the RPi to work with one of these https://a.co/d/7b78WgM
t

terarex

07/03/2023, 5:18 PM
This appears to be the same device: https://a.co/d/93wWl58. It's based on the ASM1166 controller. Best case, if it works on a generic CM4 carrier, would be to use it for HDD connectivity. Performance with the RPi 4's single PCIe Gen 2 lane wouldn't take proper advantage of SSDs. If you need SATA ports for node1 and node2. Look for this mPCIe card. It's based on the ASM1064 and works with CM4 and Jetson modules. I assume it will work with the RK1. Cablecc Mini PCI-E PCI Express to... https://www.amazon.com/dp/B0C3CMH6B8?ref=ppx_pop_mob_ap_share
d

dkryptlive

07/04/2023, 1:15 AM
Thanks for the reply! For my project, don’t need full ssd speed. Looking to use one of the CM4’s to run a NAS. That adapter looks promising, but I need more than four SATA ports… I could always use a multiplier for the existing two sata on Node 3, but looking for something more elegant… another option I’ve considered is using a mini pcie to pcie riser, then a proper pcie sata card Mini PCIe Riser: https://a.co/d/iqGD7Le PCIe SATA: https://a.co/d/ikGQ2aI
u

_dhanos_

07/04/2023, 1:21 AM
A port multiplier is going to work as well as the module you initially mentioned you wanted to use
The reason for this is a speed limit of the PCIe lane that the CM4 can use
This is exactly what I'm using. I'm yet to test it well, but the initial test shows I can easily saturate the 1 Gb/s of the network speed: https://discord.com/channels/754950670175436841/1030129990211219486/1091312860304511107
c

cbmdk

07/07/2023, 8:20 AM
did you get this to work... just got 2 boards as well 😄
u

.mvcs

07/16/2023, 2:45 PM
Hi there, I'm considering connecting an old 12v FAN (Molex 2510 4PIN) I have to the TP2 FAN (see the image). Plugging the FAN using the 2 middle pins turns the FAN on full blast. The thing is, I want to be able to control the FAN using the PWM wire. Does anybody knows if it's possible to connect the blue wire (PWM I suppose) to the GPIO 18 on the Node 1 to control the FAN from there? I don't mind relying only on the NODE 1 cpu temp. I was considering using the python script I saw on this blob post (https://blog.driftking.tw/en/2019/11/Using-Raspberry-Pi-to-Control-a-PWM-Fan-and-Monitor-its-Speed/#Use-PWM-to-Control-Fan-Speed) as a starting point. Have anybody tried something like that? I'm mostly a software guy and I don't know much about the hardware intricacies 😆 Is it a stupid thing to do?

https://cdn.discordapp.com/attachments/1090193720294522900/1130148310825586801/Screenshot_2023-07-16_at_16.20.47.png

https://cdn.discordapp.com/attachments/1090193720294522900/1130148311232413736/IMG_8318.jpg

https://cdn.discordapp.com/attachments/1090193720294522900/1130148311651848244/IMG_8319.jpg

well, I managed to not fry anything it seems 😂 it's working as intended. Next step is to buy a proper jump wire to replace this work around
t

terarex

07/20/2023, 5:33 PM
If a revised TP2 is made available, I have a couple of suggestions regarding physical characteristics: - The mPCI and M.2 standoffs should not be surface mount/soldered. They should be removable. The current board design has sufficient keep out space around the soldered standoffs to accommodate wafer head screw attachment (with Loctite threadlocker blue). To save on manufacturing cost, the standoffs and screws do not need to be factory installed. Including them in a separate bag, like the SoM JST fan cables, is satisfactory. - Increase the height of the M.2 connectors on the rear. The current connectors appear to be 2mm. Why? High capacity M.2, NVMe SSDs are double sided, and PCIe Gen 4/Gen 5 SSDs require heat sinks with thermal pads. The current M.2 connectors and standoffs do not adequately support the underside SSD thickness required for airflow. I'm going to install 4mm (5mm would be better), removable standoffs, which should provide sufficient clearance, but the SSDs will be angled. I don't think I want to tackle the job of reworking a board to desolder the existing and resolder taller M.2 sockets.
d

dkryptlive

07/26/2023, 2:29 AM
My dream TP#: Node 1 (Main) - HDMI, mini pcie, 2x USB, ability to flash other 3 nodes Node 2 (Router) - mini pcie w/ sim, 4 external ports (1 WAN/3 LAN… 2.5G or 10G would be nice too!) Node 3 (NAS) - 8 SATA ports, 2x USB Node 4 (AIML/robotics) - 2x USB, 40pin GPIO, 2x MIPI CSI-2 Edit: all with NVMe
s

silopolis

08/03/2023, 12:22 PM
Indeed, and I'd rather have one SATA per module than none!
m

mvdk85

08/05/2023, 6:53 PM
I would want to replace the 1 Gbps switch part with a 2.5Gbps or 10Gbps capable part.
u

_dhanos_

08/05/2023, 6:54 PM
Each available module has a network link speed of 1 Gb/s, so a "faster" switch is not going to change the max speed you can access the module with (but would let you utilize the max speed link of multiple modules at the same time, of course).
m

mvdk85

08/05/2023, 6:55 PM
I thought that the RK part had a 2.5Gbps capable output?
(as an *GMII thing, but still)
Or is this one of the compromises that the *S part makes?
u

_dhanos_

08/05/2023, 6:57 PM
RK3588 supports up to 1GB/s with RGMII
We're not using the S version of RK3588
m

mvdk85

08/05/2023, 7:06 PM
I suppose you could theoretically hook up both GMACs to the same chip as long as it supports LAGs?
I mean, I think there's a RTL chip that would theoretically support that, and give you a 10 Gbps uplink - I don't know how much more expensive that part would be, but I imagine the traces would be hard to find?
u

_dhanos_

08/05/2023, 7:08 PM
Possibly, but then how LACP works is it won't utilize both links for a single connection, just one of them. Then how TPi2 is designed is it utilized only a single LAN connection. I'm not sure if RK1 exposes both
Where did you get the 10Gb/s from?
m

mvdk85

08/05/2023, 7:09 PM
LAGs allow you to balance flows across them
RTL8396L is one part that would theoretically work
u

_dhanos_

08/05/2023, 7:10 PM
Meaning connections, You'd need multiple (at least 2 in this case and hope they both get routed through different interfaces)
They still will be 1Gb/s links (so a total of possible 2Gb/s)
m

mvdk85

08/05/2023, 7:10 PM
Yeah, which is twice the existing capability 😉
c

cfsworks

08/05/2023, 7:11 PM
A fun theoretical problem I want to solve is what happens when there's 2 flows, 1Gbps each, but the switch is hashing them onto the same LAG member
m

mvdk85

08/05/2023, 7:11 PM
From https://svanheule.net/switches/rtl93xx, I see that the 9302A might work.
Yeah, it
*it's an imperfect solution.
u

_dhanos_

08/05/2023, 7:12 PM
Yeah, this is the "hope" part I mentioned 😄
LACP is not "intelligent enough" to make it the way you'd like all the time
m

mvdk85

08/05/2023, 7:13 PM
In the case of large numbers of flows, this should go away, but it's only in the limiting case.
In practice, one link is always more utilised than the other, and elephant flows are the common case.
(Unless you're a hyperscaler 🙂 )
But it's definitely better than 1 link. I wonder why I thought it had a better ethernet link?
c

cfsworks

08/05/2023, 7:16 PM
The RTL8370MB has a 16-way hash-to-link table, so the fun problem to tackle would be to make a daemon that can automatically balance out this table, which should solve this problem nicely.
At least for outgoing flows 🤔
m

mvdk85

08/05/2023, 7:17 PM
elephant flows in practice make balancing it impossible.
You can only ever hope to minimise the imbalance 😉
c

cfsworks

08/05/2023, 7:18 PM
Well, yes, that
It doesn't have to be perfectly 50:50, you just don't want high congestion
If you want true 50:50, you have to go round-robin, and either use only protocols that tolerate reordering, or do what Brocade does and balance the link latency in hardware.
m

mvdk85

08/05/2023, 7:24 PM
Huh, well, there is a promising way to add capability to it, and you only have to use one of the PCIe2.1 lanes.
PCIe2.1 supports 5Gbps - overheads (I think about 10%), so if you used a chip on the board that did PCIe to gigabit, you could connect them internally at 5Gbps - overheads.
From the "right compromise" perspective, I think the Intel i225-v is available in quantity for very cheap, so it might make sense to use it instead.
c

cfsworks

08/05/2023, 7:44 PM
So the idea is 2.5GBASE-T from the module to the board?
m

mvdk85

08/05/2023, 7:45 PM
No, it would be PCIe2.1 from the module to the board, and the board hosts the 2.5Gbe controller
c

cfsworks

08/05/2023, 7:46 PM
mm, in the M.2 or mPCIe slot?
m

mvdk85

08/05/2023, 7:46 PM
Or more accurately, 4 2.5GBe controllers
Potentially.
I don't know where we are currently extracting the SATA controllers to, apparently the pins are multiplexed with those.
c

cfsworks

08/05/2023, 7:49 PM
Multiplexed or switched?
m

mvdk85

08/05/2023, 7:50 PM
Multiplexed. It looks like you configure it somehow (it doesn't specify, but I'm guessing there'll be a magic fuse or something?)
We already use this mechanism for exposing USB3.1 for one of the things.
And mPCIe slot for another node
But there are 3 things to configure, so it feels like we might not have used one.
If so, we can use one of these as a victim for a 2.5GBe controller.
c

cfsworks

08/05/2023, 7:53 PM
But if the controller is on the TP2, not the module, which Jetson pins are the victims?
m

mvdk85

08/05/2023, 7:53 PM
Oh, I see.
Yeah, that makes sense - so I suppose it would have to be on the module.
Do we export it as a *MII interface for the Jetson right now?
c

cfsworks

08/05/2023, 7:54 PM
1000BASE-T
m

mvdk85

08/05/2023, 7:54 PM
So we'd export it as a 2.5GBASE-T
Not the most pleasant of things, but I suppose it would do.
c

cfsworks

08/05/2023, 7:55 PM
Which I like since it means RK1s for people who only want 1G don't pay the extra for 2.5G
m

mvdk85

08/05/2023, 7:55 PM
Yeah, that's true.
c

cfsworks

08/05/2023, 7:55 PM
The only thing on the TP2 that has to be upgraded is the switch
m

mvdk85

08/05/2023, 7:55 PM
And it's compatible both ways
It just autonegotiates the best capability.
How do we export the second interface right now, by the way?
Is the second just unconnected?
c

cfsworks

08/05/2023, 7:58 PM
Second interface of which interconnect technology?
m

mvdk85

08/05/2023, 7:58 PM
RK1
c

cfsworks

08/05/2023, 7:59 PM
I mean fill in the blank: second _______ interface? PCIe?
m

mvdk85

08/05/2023, 7:59 PM
Ethernet
c

cfsworks

08/05/2023, 8:00 PM
Didn't know there was a second on the RK3588, but I'd guess there's no PHY on it, so the pins only go as far as the RK1 PCB.
m

mvdk85

08/05/2023, 8:00 PM
I figured that was the probably answer 😉
There was one moderately surprising choice that was made - Most of the RTL "managed switch" chips have a MIPS chip that I think would be sufficiently capable of being a BMC. Was it just that it was MIPS, or was there another problem?
Like, they certainly have more than enough GPIO pins 😉
c

cfsworks

08/05/2023, 8:10 PM
The BMC was selected relatively late in the TP2 design process, after the Ethernet switch was already chosen. I don't know what criteria went into BMC selection though. I'm surprised that there's a separate Ethernet PHY when there's extension interfaces on the RTL8370MB though.
It might have been motivated in part by UART quantity and availability of a SD/MMC interface, which the switching SoCs might not have offered.
m

mvdk85

08/05/2023, 8:13 PM
That's true, generally flash parts are chosen for switch SoC instead.
Oh my, the 8370MB is cheap - even in tiny quantities, it's just over $10.
The equivalent RTL9301 part is US$25 in 200+ quantities, and $22 for 1200+
c

cfsworks

08/05/2023, 8:18 PM
I'm also suspecting a lot of answers to design trade-off questions will be "it was the first thing we found that solved the problem"
Realtek's demo schematic for the RTL8370MB appears almost verbatim in the finished TP2, including an unused SPI-NOR out beyond node4.
m

mvdk85

08/05/2023, 8:20 PM
Wait, why include an unused part?
Oh, I think I know
The default memory map for the processor will map the SPI-NOR straight into its address space.
Anything else would require config.
c

cfsworks

08/05/2023, 8:22 PM
Because it's in the demo schematic and they didn't delete it.
m

mvdk85

08/05/2023, 8:23 PM
Yeah, but I would think that the designers would go to some trouble to save the 50c or so per SPI-NOR, right?
c

cfsworks

08/05/2023, 8:23 PM
I'd think so too. Yet it's there.
m

mvdk85

08/05/2023, 8:26 PM
You know, from a forward compatibility perspective, I like the idea of a 2.5GBaseT interface more and more - a future designer wanting a 10G or higher part, assuming that future hardware were good enough, would be able to do just that.
c

cfsworks

08/05/2023, 8:30 PM
Or 5GBASE-T-minus-overhead if it's not much more expensive 🫰
m

mvdk85

08/05/2023, 8:31 PM
Yeah, indeed
I mentioned the Intel part because it's $2 😉
But it is only 2.5GBe.
c

cfsworks

08/05/2023, 8:50 PM
The only SATA is a PCIe adapter on the TP2; no SATA goes through the socket.
m

mvdk85

08/05/2023, 8:54 PM
Oh! We don't use that bit of the RK's stuff at all 🙂
u

_dhanos_

08/05/2023, 8:54 PM
I'm trying to catch up and you got me lost here. What do you mean by this?
m

mvdk85

08/05/2023, 8:55 PM
Oh, just that we'd use one of the PCIe IFs of the RK3588 for an i225v or similar, and replace the exported 1gbase-t interface with a 2.5gbase-t interface.
u

_dhanos_

08/05/2023, 8:55 PM
With TPi2 the thing is all modules are treated more or less the same, I guess. So this is why there is ASM1061 (SATA controller) connected to Node 3 and some chip I forgot the model of connected to the Node 4 for USB 3.0
You can put 10GBASE M.2 modules on the back, if you wish 🙂
And have 10Gb/s network between the modules 😛
m

mvdk85

08/05/2023, 8:57 PM
The idea is what substitutions could be made to make it possible in a TPI2.1
u

_dhanos_

08/05/2023, 8:57 PM
But yes, the only way to get more than 1Gb/s would be to connect something to the PCie
m

mvdk85

08/05/2023, 8:58 PM
So the idea would be to replace the RTL8370MB with RTL9301 or something like that
m

mvdk85

08/05/2023, 8:59 PM
and then add an i225v, or perhaps a marvell thing to the RK1.1, and then send that over the pins used for 1GBASE-T interface.
Nah, nothing here calls for a PCIe switch.
u

_dhanos_

08/05/2023, 9:00 PM
This would mean no Mini PCIe /SATA / USB 3.0 unless you also add a PCIe switch
Well, do you need the ethernet overhead instead of direct host-to-host communication? 🙂
m

mvdk85

08/05/2023, 9:01 PM
Forgive me, I thought there were 4 PCIe interfaces on the RK3588?
u

_dhanos_

08/05/2023, 9:01 PM
There are 2 - 1x and 4x
m

mvdk85

08/05/2023, 9:02 PM
I thought there were 3 PCIe2.1 and 1 PCIe3?
c

cfsworks

08/05/2023, 9:02 PM
Time to check the datasheet
u

_dhanos_

08/05/2023, 9:03 PM

https://cdn.discordapp.com/attachments/1090193720294522900/1137491087670390804/image.png

c

cfsworks

08/05/2023, 9:03 PM

https://cdn.discordapp.com/attachments/1090193720294522900/1137491165332131880/Screenshot_20230805-150328.png

So 1x2 + 2x1 might allow the i225v upgrade
m

mvdk85

08/05/2023, 9:04 PM
What about the Combo PIPE PHY interface?
u

_dhanos_

08/05/2023, 9:05 PM
I'm reading about it right now
m

mvdk85

08/05/2023, 9:08 PM
I was guessing that we were using one of these lanes for the M.2 feature 😉
u

_dhanos_

08/05/2023, 9:08 PM
M.2 uses PCIe3 x4
m

mvdk85

08/05/2023, 9:09 PM
Oh, so we're using these lanes for the other features, then
u

_dhanos_

08/05/2023, 9:09 PM
I guess there may be indeed 2 more PCIe 2.1 that I wasn unaware of
m

mvdk85

08/05/2023, 9:09 PM
Well, maybe just 1 of them for each, because it doesn't look like they know about bonding these.
u

_dhanos_

08/05/2023, 9:09 PM
Just one of the PCIe 2.1 would be in use then, unless there's some RK1 design choice I'm not yet aware of
m

mvdk85

08/05/2023, 9:10 PM
And so there'd be room to use another on the board. You'd just have to find room on it 😉
u

_dhanos_

08/05/2023, 9:10 PM
loks like there is indeed 1x PCIe 3.0 x4 and 3x PCIe 2.1 x1
m

mvdk85

08/05/2023, 9:11 PM
It has a lot of connectivity for a tiny SoC 🙂
u

_dhanos_

08/05/2023, 9:11 PM
The room is going to be a problem - as far as I know it was a challenge to fit everything on the module of this size
I would not be surprised if the additional PCie lanes might be exposed on the connector for future use
c

cfsworks

08/05/2023, 9:12 PM
What are the i225v's cooling requirements?
m

mvdk85

08/05/2023, 9:12 PM
It's got 1.8W TDP, I think?
1.3, sorry
i226v is the norm these days
c

cfsworks

08/05/2023, 9:13 PM
Might be able to squeeze it on the back of the module somehow, and just go bald (no heatsink), but still that might be hard to fit.
m

mvdk85

08/05/2023, 9:13 PM
7x7mm
And expected discontinuance in 2032.
c

cfsworks

08/05/2023, 9:15 PM
Integrated PHY too? It goes straight from PCIe to 2.5GBASE-T?
m

mvdk85

08/05/2023, 9:15 PM
Yep
It says "NBASE-T" as the iface supported, so yeah, direct to PHY.
I'll just check the BOM of a card that uses it, but I'm pretty sure there's no external PHY
There's also the RTL8125BG, which seems to have fewer reported issues.
Looking at the card, it definitely has an integrated PHY, but it's harder to tell what the TDP is.
Yeah, it seems most of the bugs in the Intel thing are related to "EEE", that is, the energy saving part of the spec, so I'd say that the realtek chip is actually the better of the two, probably, assuming that the TDP is reasonable.
Oh, found it - https://datasheet.lcsc.com/lcsc/2205121200_Realtek-Semicon-RTL8125BG-CG_C3013605.pdf - p44, maximum operating supply current. That gives a TDP of about 1W, probably less under the specific conditions that we're running.
b

blackphoenixx85

08/15/2023, 8:52 AM
For a future TPI I would like to have the LED's of the nodes not be on the board, or they have to at least have some FRONT IO for the Node LED's so it would be possible to show the Node LEDS externally on a case. Instead of having LED's next the board, would be more efficient to simple have a 8 pin 4x2 size connector, STATUS+GND for each node where you have to connect your own LED's, maybe saving on some production costs even.
s

srcshelton

08/30/2023, 5:39 PM
Blinkenlights!

https://cdn.discordapp.com/attachments/1090193720294522900/1146499562148724757/image.png

t

thegoldbug

09/01/2023, 5:04 AM
😀
b

blackphoenixx85

09/05/2023, 12:05 PM
Support for PWM Fan connector instead of the current 2-pin 12v connctor with temp sensor, so you can hook a Noctua Fan Controller directly to the motherboard
d

dirtywretch

10/03/2023, 2:36 AM
What he said. I ordered a Noctua fan for my case while waiting for the board and now trying to figure out how I'm going to make that work.
t

teslamax

10/03/2023, 2:37 AM
Got the whole "Thinking Machines" thing going.
c

cfsworks

10/03/2023, 2:40 AM
https://github.com/turing-machines/BMC-Firmware/pull/125 may be of interest to you and @blackphoenixx85
b

blackphoenixx85

10/03/2023, 2:41 AM
@cfsworks thanks. Will look into it. Right now I have a noctua FC1 controller so I can control it manually
d

dirtywretch

10/03/2023, 2:46 AM
Thanks for that update. I don't know where that leaves me since I don't understand the gestalt of that, but I'll take it as SOL and that I should look at the FC1 controller. Thank you!
c

cfsworks

10/03/2023, 2:48 AM
If you're comfortable soldering, you can order an EMC2301 chip and Molex 4-pin fan connector and get PWM fan control from the BMC with your current TP2 board. If you want to go that route (I did, works well for me).
d

dirtywretch

10/03/2023, 3:10 AM
I've never soldered anything before, so, not excited with that idea. In Geerling's "Racking" video from last year, he made it sound like the four pin connector he shows would have pwm control when the board went into production. "I know they're working on it." He was using a Noctua fan.
b

blackphoenixx85

10/05/2023, 8:43 AM
I went with Noctua Chromax 140mm Fan with a Noctua FC1 Fan Controller
j

j.lec

10/06/2023, 9:12 PM
Can you elaborate more on this setup?
d

dirtywretch

10/07/2023, 4:34 AM
I ordered the Noctua FC1. I have two Noctua 120x25 fans, one of which I'm going to return to get a thinner one (25mm > 15mm) to put at the top of the case after I order a fan bracket. I'd like to put a fan over the motherboard, but would need standoffs and a larger fan. Maybe with the top and bottom fans and the heat sink fans the thermals will be fine.
p

pink6

10/08/2023, 3:07 PM
Awesome. What expansion card are you using?
t

terarex

10/08/2023, 3:26 PM
For nodes 1 and 2, install a Mini PCIe card containing either a ASM1061 (2 SATA ports) or ASM1064 (4 SATA ports). Stay away from the ASM RAID cards. They don't work. ASM1061-based mPCIe cards are 2230. ASM1064-based mPCIe cards are 2242. With the latter you'll need to insulate or remove the standoff at the 2230 position to prevent it from shorting solder points on the bottom of the card. node 3 has access to 2 SATA ports from an on-TPi2 ASM1061. Note: you may need to install the AHCI/SATA driver package. Symptom is Linux doesn't see the SATA drives, but "lspci" shows the presence of the ASMedia controller
p

pink6

10/08/2023, 4:25 PM
Thanks Dan! When I get the RKs I want to set this up in a similar way. I want the ability to backup/RAID my drives too.
s

srcshelton

10/14/2023, 10:21 PM
I need to finalise the software and push it to GitHub - but it's basically the same as using using the GPIO pins to drive a directly-connected fan, just that the fan's actually connected to the furthest node...
p

phantom79

11/04/2023, 7:14 PM
Would love to see the SATA / PCI HIGH-speed USB-3 etc... shareable / assignable to any of the 4 slots ( thru firmware - just like we assign the usb2.0 port to any of the slots) - dunno how feasible this is - but right now having the SATA stuck to 1 node is limiting....
t

the_1st_bodybagger

11/04/2023, 8:07 PM
I'd like to see a method to connect from the BMC serial port to those of the nodes. I have an OrangePi One sitting on my M-iTX case, connected to a USB serial cable. I can SSH into my OrangePi (Debian) and use screen to connect to the BMC so it's acting as a serial terminal server. It would be nice to see a similar method to connect to the node serial ports while attached to the BMC serial port.
s

scienceman.

11/04/2023, 8:40 PM
You mean like a built-in KVM switch? I don't think that's within the hardware capabilities of the current TPi board, though I could be wrong. (Don't think so, though.)
t

the_1st_bodybagger

11/06/2023, 8:27 PM
Not quite a KVM, a serial switch, connects multiple serial ports to ethernet. I used to use them to connect to VAX servers. Can still purchase a dedicated one, but very $$$$! Perle still do them. They are also used today for out of band communication to physical network equipment in some datacentres https://www.perle.com/products/iolan-stg-terminal-server.shtml I could theoretically connect the GPIO to all 4 of the other UART ports on the board and as long as that device was functional I could SSH into it and use screen to connect to the other devices "debug" ports. Startech do a 4 port to USB one which I suppose I could connect to another raspberry pi device https://www.startech.com/en-ie/cards-adapters/icusb2324 Or I could just get 4 uart to USB cables and connect them direct to a raspberry pi... It would be nice if that functionality could go into the next revision TPi 3 or whatever
t

terarex

11/26/2023, 5:45 PM
I'm hoping Turing Machines retains and populates the 4-pin, PWM fan header and the EMC2301 (at U109) fan controller on the v2.5 board. Retaining the existing 2-pin fan header would also be useful. Adding default PWM support would eliminate the need to acquire a separate and extra cost variable speed fan controller.
u

_dhanos_

11/26/2023, 6:07 PM
TPi2 v2.5 is going to contain a PWM-controllable fan 🙂
t

terarex

11/26/2023, 9:01 PM
Excellent! Thanks for the info.
d

dethtungue

11/27/2023, 9:34 PM
If it hasn't been requested already, please put the board's SD card on top of the board. It is a real pain to access once the board is installed in a case.
p

phantom79

11/28/2023, 12:22 AM
+1 on this - particularly if we plan to make firmware install via sd card - it’s gonna be accessed more frequently- unless of course the official case makes it a breeze to access this via back plane along with the m.2 slots
s

srcshelton

11/28/2023, 8:34 PM
I used an SD extension cable so that I've got a tethered SD card socket elsewhere in my case!
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