Customising Jetson Nano pinout Turing Pi #│forum

Customising Jetson Nano pinout

werdnum

07/03/2023, 8:13 AM

So I noticed yesterday that the Jetson Nano actually has the capability to remap some of the I/O pins - it's recommended to do it for each carrier board. I wonder if it's possible to unlock some of the missing Jetson functionality this way

werdnum

07/03/2023, 8:14 AM

https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-3261/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/adaptation_and_bringup_nano.html%23wwpID0EAAI0QL0HA

werdnum

07/03/2023, 8:14 AM

In particular there's something about an x4 and an x1 PCIe lane, plus additionally USB3.0 and USB2.0 controllers

werdnum

07/03/2023, 8:16 AM

I see the Orin has PCIE0 (x4) around 131-162

werdnum

07/03/2023, 8:18 AM

Which is same for Nano

werdnum

07/03/2023, 8:18 AM

And then PCIE1 on the Orin is 167-174

werdnum

07/03/2023, 8:25 AM

Hmm but that's reserved on the Nano

werdnum

07/03/2023, 8:25 AM

I do see USB0-2 listed with 109,111, 115,117 and 163,161

CFSworks

07/03/2023, 8:27 AM

Copy code

To define your board’s pinmux configuration, you must download the appropriate Jetson Nano pinmux table from the Jetson Download Center and customize it for the configuration of your board using the following procedures. Be sure to get the right version of the table for your SOM.

CFSworks

07/03/2023, 8:27 AM

Absolutely wild to me that they use Microsoft Excel as the GUI for configuring these, but it should make it pretty easy to see what combinations are valid at least

CFSworks

07/03/2023, 8:29 AM

It's behind a login page, but: https://developer.nvidia.com/jetson-nano-pinmux

werdnum

07/03/2023, 8:30 AM

Yeah... There's some jetson_io tool in recent versions of L4T apparently

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